Project Setup

Instructions for setting up a project directory and Design Compiler setup file for your project.


Directory Structure

In order to keep your project data well-organized and safe, it is recommended to store files in each project into a separate project directory. The following example proposes one possible directory structure for small projects.

The example below includes an optional simulation directory (SIM/) for ModelSim which is not needed in these exercises but is shown as an example of what sort of subdirectories might be needed in real projects.


/ -- project directory
.synopsys_dc.setup -- Synopsys Design Compiler initialization file
modelsim.ini -- ModelSim initialization file
SRC/ -- HDL source files
SYN/ -- synthesis subdirectory
DDC/ -- Design Compiler database
NETLIST/ -- mapped Verilog/VHDL netlists
RPT/ -- reports
SCR/ -- synthesis scripts
WORK/ -- intermediate files from synthesis tool
SIM/ -- simulation subdirectory (not needed in these examples)
SCR/ -- simulation scripts
WORK/ -- ModelSim work directory

You may copy the directory structure shown above and use it as such, modify it as you like, or create your own directory structure according to your needs for your own projects. Whichever way you choose do, keep in mind that consistent and simple directory structure helps you to reuse your code from different projects and to automate some tasks in the design flow.

Note that unless otherwise stated, the examples in this tutorial assume that the directory structure described above is used.

Setup file .synopsys_dc.setup

The .synopsys_dc.setup file is the setup file for Synopsys' Design Compiler. Setup file is used for initializing design parameters and variables, declare design libraries, and so on. Shortly, the setup file defines the behavior of the tool and is required for setting the tool up correctly. The commands in this file are executed when Design Compiler is invoked. There are three different locations from where this file is searched for:

The Synopsys root directory (/admin/setup/) for system-wide settings

Your home directory ($HOME/) for user-defined settings

The current working directory ($PWD/) for design-specific settings

The files are read in the order shown above. Settings in user-specific setup file override the settings from system-wide setup file and settings in design-specific setup file overrides settings from both system-wide and user-specific setup file. You should have at least design-specific setup file for each of your projects.

Example setup file

The following shows an example of a minimal setup file using dctcl syntax. The example setup file has also been adapted to use the directory structure described above:

# Minimal .synopsys_dc.setup file
# Define the UMC L180 GII library
set UMC /share/tktprog/IC/umc
set L180_GII ${UMC}/L180_GII/core/UMCL18G212D3_1.0/design_compiler
# Define the libraries and search path
set search_path [concat $search_path ./SRC ./SYN/SCR ${L180_GII}]
set target_library ${L180_GII}/umcl18g212t3_tc_180V_25C.db
set synthetic_library dw_foundation.sldb
set link_library [concat "*" $target_library $synthetic_library]
set symbol_library ${L180_GII}/umcl18g212t3.sdb
define_design_lib WORK -path ./SYN/WORK



The example file does the following:

Sets the search_path

If a file is referenced just by its name (directory path not specified) then Design Compiler searches the file from the directories specified by the search_path variable. For example, in this case the search order is: the current directory (.), Synopsys installation directories /libraries/syn, /dw/syn_ver, and /dw/sim_ver, and finally the directories ./SRC and ./SYN/SCR in the project directory and the UMC technology library directory.

Sets the target_library

The target library variable defines the technology library that Design Compiler uses to build the circuit. That is, during technology mapping phase Design Compiler selects components from the library specified with the target library variable to build the gate-level netlist. In this example, we are using the UMC L180 GII library which can be found from the ${L180_GII} directory.

Sets the synthetic_library

The synthetic library variable specifies the synthetic or DesignWare libraries. These synthetic libraries are technology-independent, microarchitecture-level design libraries providing implementations for various IP blocks.

Note that these libraries are tighly integrated into the Synopsys synthesis environment (i.e. they cannot be used with non-Synopsys synthesis tools).

The standard.sldb synthetic library which is automatically included contains basic implementations for the built-in HDL operators (adders, subtractors, comparators etc). The dw_foundation library which is shown in the example includes DesignWare Building Block IP Libraries DW01, DW02, DW03, DW04, DW05, DW06, and DW07. These libraries provide more advanced implementations for the built-in operators to improve performance. They also include implementations for more complex arithmetic operators such as MAC, SOP, and vector adders. Other DesignWare libraries include e.g. building blocks for DSP (FIR and IIR filters), memories, advanced math functions, microcontrollers and so on. If additional synthetic libraries are defined with the synthetic_library variable, they must also be included in the link_library variable.

Sets the link_library

The link library variable is used to resolve design references. That is, Design Compiler must connect all the library components and designs it references. This step is called linking the design or resolving references.

Note that in most cases the link library is the same as the target library.

The asterisk (*) in the link library variable tells that Design Compiler should first search the reference from the memory.

Sets the symbol_library

Symbol library defines the schematic symbols for components in technology library. These symbols are needed for drawing design schematics.

Sets the path to work library

This command maps a design library to a directory. Design Compiler uses this directory to store intermediate represenstations of the design it generates during synthesis.

Note that since the search path variable defines directories ${L180_GII} and /libraries/syn, we can reference the UMC technology library and dw_foundation library just by their name.